[NET] ESP32 Ethernet: PHY cold-cycle at boot, default on Theengs Bridge (#2364)

Power ETH_PHY_POWER down for 200 ms and back up 200 ms before ETH.begin()
so the PHY always gets a true cold start. A warm PHY left in a stale state
(reproduced on Theengs Bridge v1.1 with PSRAM enabled after an NVS erase)
can flap the link until a manual power cycle: it reports up for one poll,
then down for several seconds, forever, so DHCP never completes. The short
reset the Ethernet driver performs on its own does not clear that state; a
power cycle with a settle window before begin() does. On a hardware-in-the-
loop bench the same provocation went from flapping every trial to flapping
in none of them (4/4).

Enabled via -DETH_PHY_COLD_CYCLE, only active when ETH_PHY_POWER is a valid
pin, at the cost of ~400 ms added boot time. Set by default on both Theengs
Bridge environments.

Co-authored-by: Florian <1technophile@users.noreply.github.com>
Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
This commit is contained in:
authored and GitHub committed 2026-08-31 08:39:39 -05:00
1 parent 1dfa2f17fb
commit 4e3ed19827
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@@ -74,6 +74,7 @@ build_flags =
'-DETH_PHY_MDC=23'
'-DETH_PHY_MDIO=18'
'-DETH_CLK_MODE=ETH_CLOCK_GPIO0_OUT'
'-DETH_PHY_COLD_CYCLE'
'-DLED_ADDRESSABLE_PIN1=32'
'-DLED_ADDRESSABLE_NUM=4'
'-DLED_BROKER=0'
@@ -113,6 +114,7 @@ build_flags =
'-DETH_PHY_MDC=23'
'-DETH_PHY_MDIO=18'
'-DETH_CLK_MODE=ETH_CLOCK_GPIO0_OUT'
'-DETH_PHY_COLD_CYCLE'
'-DLED_ADDRESSABLE=true'
'-DLED_ADDRESSABLE_PIN1=32'
'-DLED_ADDRESSABLE_NUM=4'